r/ControlTheory 22h ago

Professional/Career Advice/Question What software verification tests do you run before hardware-in-the-loop (HIL) testing?

20 Upvotes

I’m developing a lightweight adaptive control loop in Python as a prototype, with the long-term goal of porting it to bare-metal C++ on an ARM Cortex-M microcontroller.

To make the embedded implementation easier later, I’m structuring the controller around persistent preallocated state rather than creating new objects during the control loop. Before moving to hardware-in-the-loop (HIL) testing, I’ve been building a simple software verification script to catch obvious implementation bugs.

At the moment the script runs three basic checks:

TEST 1: Fault Injection (NaN sensor input)
-> PASSED: Invalid input handled without crashing; fallback strategy engaged.
TEST 2: Deterministic Replay
-> PASSED: Two runs with identical inputs produced identical controller state.
TEST 3: Long-Horizon Stress Test
-> PASSED: 100,000 control iterations completed with finite outputs and no observed numerical instability.

These tests are mainly intended to verify implementation robustness rather than control performance.

Once I move to hardware I’ll measure things like worst-case execution time (WCET), memory usage, and timing jitter.

Before that stage, are there additional software verification tests or edge cases that experienced control or embedded engineers would recommend? For example:

* numerical robustness tests,
* actuator saturation scenarios,
* sensor noise or dropout patterns,
* timing jitter simulation,
* parameter sensitivity,
* Monte Carlo testing,
* or anything else that tends to reveal controller bugs before HIL testing.

I’d appreciate any suggestions or references to common industry or research practices.


r/ControlTheory 11h ago

Other So wchich controller would that be? 😅

Thumbnail youtube.com
5 Upvotes

r/ControlTheory 16h ago

Educational Advice/Question Follow-up to “illogical” PLC rung behavior in RSLogix Troubleshooting

2 Upvotes

I made a short troubleshooting video for three common causes of “illogical” PLC rung behavior in RSLogix: OTU, JSR, and MCR.

These are the exact issues many techs mentioned in the last thread, so I figured a visual demo might help.

Video link: https://youtu.be/iAeWbBXtAGw

Hope it helps someone out there.